• Published a Paper on “FPGA Implementation of Binary Coded Decimal Digit ALU” in IJSTER, Vol.02, Issue.11, September-2013.
• Published a Paper on “Design of an Effective Vedic Multiplier by Rapid Power Implementation”, IJRRECS, Vol.01, Issue 05, September-2013.
• Published a Paper on “A Novel Approach for Producing High Throughput PRNG”, IJERT, Vol. 3 Issue 1, January – 2014.
PERSONAL DETAILS
RAVULA VIJAYA
1981-10-04
Female
vijayar@b-iet.ac.in
Electronics & Communication Engineering
Assistant Professor
FACULTY PHOTO
EDUCATIONAL QUALIFICATIONS
M.Tech / M.E.
(Instrumentation and Control Systems)
- JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY,KAKINADA.,
2009
B.Tech / B.E.
(ELECTRONICS AND COMMUNICATION ENGINEERING)
- JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY,HYDERABAD,
2004
PUBLICATIONS
3 Publications
FDPs, WORKSHOPS & CONFERENCES
10 FDPs
| 1 Workshops
| 1 Conferences
1. ATAL FDP on: Futuristic Frontiers: AI &IoT Integration for advancing Signal Processing Development
2. ATAL FDP on: FDP on Recent Developments in High-Performance Semiconductor Devices and Their Applications
3. ATAL FDP on: Emerging Trends in VLSI Design for Signal Processing and Communication Systems
2. ATAL FDP on: FDP on Recent Developments in High-Performance Semiconductor Devices and Their Applications
3. ATAL FDP on: Emerging Trends in VLSI Design for Signal Processing and Communication Systems
PERSONAL INSIGHTS
1. Image Processing
2. Microcontrollers
3. Digital Electronics
2. Microcontrollers
3. Digital Electronics